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copyright ? 2010 future technology devices international limited 1 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 future technology devices international ltd ft4232h quad high speed usb to multipurpose uart / mpsse ic the ft4232h is ftdis 5 th gene ration of usb devices. the ft4232h is a usb 2.0 high speed (480mb/s) to uart/mpsse ics. the device features 4 uarts. two of these have an option to independently configure an mpsse engine. this allows the ft4232h to operate as two uart/bit - bang ports plus two mpsse engines used to emulate jtag, spi, i 2 c , bit - bang or other synchronous serial modes. the ft4232h has the following advanced features: single chip usb to quad serial ports with a variety of configurations. entire usb protocol handled on the chip. no usb specific firmware programming required. usb 2.0 high speed (480mbits/second) and full speed (12mbits/second) compatible. two multi - protocol synchronous serial engine (mpsse) on channel a and channel b, to simplify synchronous serial protocol (usb t o jtag, i 2 c, spi or bit - bang) design. independent baud rate generators. rs232/rs422/rs485 uart transfer data rate up to 12mbaud. (rs232 data rate limited by external level shifter). ftdis royalty optional traffic tx/rx indicators can be added with leds and an external 74hc595 shift register. adjustable receive buffer timeout. support for usb suspend and resume conditions via pwren#, sus pend# and ri# pins. highly integrated design includes +1.8v ldo regulator for vcore, integrated por function and on chip clock multiplier pll (12mhz C ftdi ft232b style, asynchronous serial uart interface option with full hardware handshaking and modem interface signals. fully assisted hardware or x - on / x - off software handshaking. uart interface supports 7/8 bit data, 1/2 stop bits, and odd/even/mark/space/no parity. auto - transmit enable control for rs485 serial applications using txden pin. oper ational configuration mode and usb description strings configurable in external eeprom over the usb interface. low operating and usb suspend current. configurable i/o drive strength (4,8,12 or 16ma) and slew rate. supports bus powered, self powered and hig h - power bus powered usb configurations. uhci/ohci/ehci host controller compatible. usb bulk data transfer mode (512 byte packets in high speed mode). dedicated windows dlls available for usb to jtag, usb to spi, and usb to i 2 c applications. +1.8v (chip cor e) and +3.3v i/o interfacing (+5v tolerant). extended - 40c to 85c industrial operating temperature range. compact 64 - ld lead free lqfp or qfn package +3.3v single supply operating voltage range. e sd protection for ft4 232h ios neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or re produced in any material or electronic form without the prior written consent of the copyright holder. this product and its documentation are supplied on an as - is basis and no warranty as to their suitability for any particular purpose is either made or implied. future technology devices international ltd will not accept any claim for damages howsoever arising as a result of use or failure of this product. your statutory rights are not affected. this product or any variant of it is not intended for use in any medical appliance, de vice or system in which the failure of the product might reasonably be expected to result in personal injury. this document p rovides preliminary information that may be subject to change without notice. no freedom to use patents or other intellectual prope rty rights is implied by the publication of this document. future technology devices international ltd, unit 1, 2 seaward place, centurion business park, glasgow g41 1hh united kingdom. scotland registered company number: sc136640
copyright ? 2010 future technology devices international limited 2 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 1 typical applications sin gle chip usb to four channels uart (rs232, rs422 or rs485) or bit - bang interfaces. single chip usb to 2 jtag channels plus 2 uarts. single chip usb to 1 jtag channel plus 3 uarts. single chip usb to 1 spi channel plus 3 uarts. single chip usb to 2 spi c hannels plus 2 uarts. single chip usb to 2 bit - bang channels plus 2 uarts. single chip usb to 1 spi channel, plus 1 jtag channel plus 2 uarts. single chip usb to 2 i 2 c channels plus 2 uarts. numerous combinations of 4 channels. upgrading legacy periph eral designs to usb field upgradable usb products cellular and cordless phone usb data transfer cables and interfaces. interfacing mcu / pld / fpga based designs to usb pda to usb data transfer usb smart card readers usb instrumentation usb industrial con trol usb mp3 player interface usb flash card reader / writers set top box pc - usb interface usb digital camera interface usb bar code readers 1.1 driver support the ft4232h requires usb drivers (listed below) , available free from http://www.ftdichip.com , which are used to make the ft4232h appear as a virtual com port (vcp). this allows the user to communicate with the usb interface via a standard pc serial emulation port (for example tty). another ftdi usb driver, the d 2xx driver, can also be used with application software to directly access the ft4232h through a dll. royalty free virtual com port (vcp) drivers for... windows 2000, server 2003, server 2008 windows xp and xp 64 - bit windows vista and vista 64 - bit windows x p embedded windows ce 4.2, 5.0, 5.2 and 6.0 mac os - x windows 7 and windows 7 64 - bit royalty free d2xx direct drivers (usb drivers + dll s/w interface) windows 2000, server 2003, server 2008 windows xp and xp 64 - bit windows vista and vista 64 - bit windows xp embedded windows ce 4.2, 5.0, 5.2 and 6.0 linux (2.4 or later) and linux x86_64 windows 7 and windows 7 64 - bit for driver installation, please refer to the application note: an_107, advanced driver options . an_103, ftdi drivers installation guide for vista . an_119 , ftdi drivers installation guide for windows7 . an_104, ftdi drivers installation guide for windowsxp . the following additional installation guides application notes and technical notes are also available: an_113, interfacing ft2232h hi - speed devices to i2c bus . an_109 C prog ramming guide for high speed ftci2c dll an_110 C programming guide for high speed ftcjtag dll an_111 C programming guide for high speed ftcspi dll an 113 C interfacing ft2232h hi - speed devices to i2c bus an114 C interfacing ft2232h hi - speed devices to spi bus an135 C mpsse basics an108 - command processor for mpsse and mcu host bus emulation modes tn_104, guide to debugging customers failed driver installation
copyright ? 2010 future technology devices international limited 3 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 1.2 part numbers part number package ft4232hl - xxxx 64 pin lqfp ft4232hq - xxxx 64 pin qfn note: packaging codes for xxxx is: - reel: taped and reel (lqfp =1000 pcs per reel, qfn =4000 pcs per reel) - tray: tray packing, (lqfp =160 pcs per t ray, qfn =260 pcs per tray) please refer to section 8 for all package mechanical parameters. 1.3 usb compliant the ft4 232h is fully compliant with the usb 2.0 specification and has been given the usb - if test - id (tid) 40720024 . the timing of the rise/fall tim e of the usb signals is not only dependant on the usb signal drivers, it is also dependant system and is affected by factors such as pcb layout, external components and any transient protection present on the usb signals. for usb compliance these may requi re a slight adjustment. this timing can be modified through a programmable setting stored in the same external eeprom that is used for the usb descriptors. timing can also be changed by adding appropriate passive components to the usb signals.
copyright ? 2010 future technology devices international limited 4 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 2 ft4232h block diagram figure 2 . 1 ft4232h block diagram for a description of each function please refer to section 4 . 1 2 0 m h z d u a l p o r t t x b u f f e r 2 k b y t e s d u a l p o r t r x b u f f e r 2 k b y t e s b a u d r a t e g e n e r a t o r m u l t i - p u r p o s e u a r t / b i t - b a n g c o n t r o l l e r a d b u s 0 a d b u s 1 a d b u s 2 a d b u s 3 a d b u s 4 a d b u s 5 a d b u s 6 a d b u s 7 1 2 0 m h z d u a l p o r t t x b u f f e r 2 k b y t e s d u a l p o r t r x b u f f e r 2 k b y t e s b a u d r a t e g e n e r a t o r m u l t i - p u r p o s e u a r t / b i t - b a n g c o n t r o l l e r b d b u s 0 b d b u s 1 b d b u s 2 b d b u s 3 b d b u s 4 b d b u s 5 b d b u s 6 b d b u s 7 1 2 0 m h z d u a l p o r t t x b u f f e r 2 k b y t e s d u a l p o r t r x b u f f e r 2 k b y t e s b a u d r a t e g e n e r a t o r m u l t i - p u r p o s e u a r t / b i t - b a n g c o n t r o l l e r c d b u s 0 c d b u s 1 c d b u s 2 c d b u s 3 c d b u s 4 c d b u s 5 c d b u s 6 c d b u s 7 1 2 0 m h z d u a l p o r t t x b u f f e r 2 k b y t e s d u a l p o r t r x b u f f e r 2 k b y t e s b a u d r a t e g e n e r a t o r m u l t i - p u r p o s e u a r t / b i t - b a n g c o n t r o l l e r d d b u s 0 d d b u s 1 d d b u s 2 d d b u s 3 d d b u s 4 d d b u s 5 d d b u s 6 d d b u s 7 1 2 0 m h z 1 2 0 m h z 1 2 0 m h z 1 2 0 m h z u s b p r o t o c o l e n g i n e a n d f i f o c o n t r o l u t m i p h y u s b d m u s b d p r r e f r e s e t g e n e r a t o r r e s e t # t e s t o s c i o s c o 1 . 8 v o l t l d o r e g u l a t o r v c c 3 v 3 i n v 1 . 8 o u t e e p r o m i n t e r f a c e e e c s e e s k e e d a t a p w r e n # s u s p e n d # m p s s e / m p s s e /
copyright ? 2010 future technology devices international limited 5 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 table of contents 1 typical applications ................................ ................................ ...... 2 1.1 driver support ................................ ................................ .................... 2 1.2 part numbers ................................ ................................ ...................... 3 1.3 usb compliant ................................ ................................ .................... 3 2 ft4232h block diagram ................................ ............................... 4 3 device pin out and signal description ................................ .......... 7 3.1 64 - pin lqfp and 64 - pin qfn package schematic symbol ................... 7 3.2 ft4232h pin descriptions ................................ ................................ ... 8 3.3 common pins ................................ ................................ .................... 10 3.4 configured pins ................................ ................................ ................ 12 3.4.1 ft4232h pins used as an asynchronous seri al interface ................................ .................. 12 3.4.2 ft4232h pins used in a synchronous or asynchronous bit - bang interface ........................ 13 3.4.3 ft4232h pins used in an mps se ................................ ................................ .................. 14 4 function description ................................ ................................ ... 15 4.1 key features ................................ ................................ ..................... 15 4.2 function al block descriptions ................................ ........................... 15 4.3 ft232 uart interface mode description ................................ ........... 17 4.3.1 rs232 configuration ................................ ................................ ................................ .. 17 4.3.2 rs422 configuration ................................ ................................ ................................ .. 18 4.3.3 rs485 configuration ................................ ................................ ................................ .. 19 4.4 mpsse interface mode descriptio n. ................................ .................. 20 4.4.1 mpsse adaptive clocking ................................ ................................ ............................ 21 4.5 synchronous and asynchronous bit - bang interface mode description 22 4.6 ft4232h mode selection ................................ ................................ ... 24 5 devices characteristics and ratings ................................ ........... 25 5.1 absolu te maximum ratings ................................ ............................... 25 5.2 dc characteristics ................................ ................................ ............. 26 5.3 esd tolerance ................................ ................................ ................... 28 6 ft4232h configurations ................................ ............................. 29 6.1 usb bus powered configuration ................................ ...................... 29 6.2 usb self powered configuration ................................ ....................... 31 6.3 oscillator configuration ................................ ................................ .... 33 6.4 4 channel transmit and receiver led indication example ............... 34 7 eeprom configuration ................................ ................................ 35 8 package parameters ................................ ................................ ... 36
copyright ? 2010 future technology devices international limited 6 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 8.1 ft4232hq, qfn - 64 package dimensions ................................ .......... 37 8.2 ft4232hl, lqfp - 64 package dimensions ................................ ......... 38 8.3 solder reflow profile ................................ ................................ ........ 40 9 contact infor mation ................................ ................................ ... 42 appendix a - list of figures and tables ................................ ..................... 43 list of tables ................................ ................................ ............................. 43 appendix b - revision history ................................ ................................ .... 45
copyright ? 2010 future technology devices international limited 7 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 3 device pin out and signal description the 64 - pin lqfp and 64 - pin qfn have the same pin numbering for specific functions. this pin numbering is illustrated in the schematic symbol shown in figure 3 . 1 . 3.1 64 - pin lqfp and 64 - pin qfn package schematic symbol figure 3 . 1 ft4232h schematic symbol g n d 1 o s c i 2 o s c o 3 v p h y 4 g n d 5 r e f 6 d m 7 d p 8 v p l l 9 a g n d 1 0 g n d 1 1 v c o r e 1 2 t e s t 1 3 r e s e t # 1 4 g n d 1 5 a d b u s 0 1 6 a d b u s 1 1 7 a d b u s 2 1 8 a d b u s 3 1 9 v c c i o 2 0 a d b u s 4 2 1 a d b u s 5 2 2 a d b u s 6 2 3 a d b u s 7 2 4 g n d 2 5 2 6 2 7 2 8 2 9 3 0 v c c i o 3 1 3 2 3 3 3 4 g n d 3 5 s u s p e n d # 3 6 v c o r e 3 7 b d b u s 0 3 8 b d b u s 1 3 9 b d b u s 2 4 0 b d b u s 3 4 1 v c c i o 4 2 b d b u s 4 4 3 b d b u s 5 4 4 b d b u s 6 4 5 b d b u s 7 4 6 g n d 4 7 4 8 v r e g o u t 4 9 v r e g i n 5 0 g n d 5 1 5 2 5 3 5 4 v c c i o 5 6 5 5 5 7 5 8 5 9 p w r e n # 6 0 e e c l k 6 2 e e d a t a 6 1 e e c s 6 3 v c o r e 6 4 f t 4 2 3 2 h c d b u s 0 c d b u s 1 c d b u s 2 c d b u s 3 c d b u s 4 c d b u s 5 c d b u s 6 c d b u s 7 d d b u s 0 d d b u s 1 d d b u s 2 d d b u s 3 d d b u s 4 d d b u s 5 d d b u s 6 d d b u s 7
copyright ? 2010 future technology devices international limited 8 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 3.2 ft4232h pin descriptions this s ection describes the operation of the ft4232h pins. both the lqfp and the qfn packages have the same function on each pin. the function of many pins is determined by the configuration of the ft4232h. the following table details the function of each pin dep endent on the configuration of the interface. each of the functions are described in table 3 . 1 ( note: the convention used throughout this document for active low signals is the signal name followed by a #)
copyright ? 2010 future technology devices international limited 9 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 table 3 . 1 ft4232h pin configurations * ri#/ or txden is selectable in the eeprom. default is ri# . ft423 2h pins pin functions (depend on configuration) pin # pin name async serial (rs232) async bit - bang sync bit - bang mpsse channel a 16 adbus0 txd d0 d0 tck/sk 17 adbus1 rxd d1 d1 tdi/do 18 adbus2 rts# d2 d2 tdo/di 19 adbus3 cts# d3 d3 tms/cs 21 adbus 4 dtr# d4 d4 gpiol0 22 adbus5 dsr# d5 d5 gpiol1 23 adbus6 dcd# d6 d6 gpiol2 24 adbus7 ri#/ txden* d7 d7 gpiol3 channel b 26 bdbus0 txd d0 d0 tck/sk 27 bdbus1 rxd d1 d1 tdi/do 28 bdbus2 rts# d2 d2 tdo/di 29 bdbus3 cts# d3 d3 tms/cs 30 bdbus4 dtr# d 4 d4 gpiol0 32 bdbus5 dsr# d5 d5 gpiol1 33 bdbus6 dcd# d6 d6 gpiol2 34 bdbus7 ri#/ txden* d7 d7 gpiol3 channel c 38 cdbus0 txd d0 d0 rs232 or bit - bang interface 39 cdbus1 rxd d1 d1 rs232 or bit - bang interface 40 cdbus2 rts# d2 d2 rs232 or bit - bang interface 41 cdbus3 cts# d3 d3 rs232 or bit - bang interface 43 cdbus4 dtr# d4 d4 rs232 or bit - bang interface 44 cdbus5 dsr# d5 d5 rs232 or bit - bang interface 45 cdbus6 dcd# d6 d6 rs232 or bit - bang interface 46 cdbus7 ri#/ txden* d7 d7 rs232 or bit - bang interface channel d 48 ddbus0 txd d0 d0 rs232 or bit - bang interface 52 ddbus1 rxd d1 d1 rs232 or bit - bang interface 53 ddbus2 rts# d2 d2 rs232 or bit - bang interface 54 ddbus3 cts# d3 d3 rs232 or bit - bang interface 55 ddbus4 dtr# d4 d4 rs232 or bit - b ang interface 57 ddbus5 dsr# d5 d5 rs232 or bit - bang interface 58 ddbus6 dcd# d6 d6 rs232 or bit - bang interface 59 ddbus7 ri#/ txden* d7 d7 rs232 or bit - bang interface 60 pwren# pwren# pwren# pwren# pwren# 36 suspend# suspend# suspend# suspend# suspen d# configuration memory interface 63 eecs 62 eeclk 61 eedata
copyright ? 2010 future technology devices international limited 10 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 3.3 common pins the operation of the followi ng ft4232h pins are the same regardless of the configured mode: - pin no. name type description 12,37,64 vcore power input +1.8v input. core supply voltage input 20,31,42,56 vccio power input +3.3v input. i/o interface power supply input. failure to c onnect all vccio pins will result in failure of the device. 9 vpll power input +3.3v input. internal phy pll power supply input. it is recommended that this supply is filtered using an lc filter. 4 vphy power input +3.3v input. internal usb phy power su pply input. note that this cannot be connected directly to the usb supply. a +3.3v regulator must be used. it is recommended that this supply is filtered using an lc filter. 50 vregin power input +3.3v input. integrated 1.8v voltage regulator input. 49 v regout power output +1.8v output. integrated voltage regulator output. connect to vcore with 3.3uf filter capacitor. 10 agnd power input 0v analog ground. 1,5,11,15, 25,35,47,51 gnd power input 0v ground input. table 3 . 2 power and ground
copyright ? 2010 future technology devices international limited 11 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 pin no. name type description 2 osci input oscillator input. 3 osco output oscillator output. 6 ref input current reference C connect via a 12k ohm resistor @ 1% to gnd. 7 dm input usb data signal minus. 8 dp input usb data signal plus. 13 test input ic test pin C for normal operation should be connected to gnd. 14 reset# input reset input (active low). 60 pwren# output active low power - enable output. pwren# = 0: normal operation. pwren# =1 : usb suspend mode or device has not been configured. this can be used by external circuitry to power down logic when device is in usb suspend or has not been configured. 36 suspend# output active low when usb is in suspend mode. table 3 . 3 common function pins pin no. name type description 63 eecs i/o eeprom C chip select. tri - state during device reset. 62 eeclk output clock signal to eeprom. tri - state during device reset. when not in reset, this outputs the eeprom clock. 6 1 eedata i/o eeprom C data i/o connect directly to data - in of the eeprom and to data - out of the eeprom via a 2.2k resistor. also, pull data - out of the eeprom to vcc via a 10k resistor for correct operation. tri - state during device reset. table 3 . 4 eeprom interface group
copyright ? 2010 future technology devices international limited 12 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 3.4 configured pins the following sections describe the function of the configurable pins referred to in table 3 . 1 which is determined by how the ft4232 h is configured. 3.4.1 ft4232h pins used as an asynchronous serial interface the ft4232h any of the 4 channels can be configured as an asynchronous serial uart interface (rs232/422/485). when configured in this mode, the pins used and the descriptions of the sig nals are shown in table 3 . 5 . channel a pin no. channel b pin no. channel c pin no. channel d pin no. name type rs232 configuration description 16 26 38 48 txd output txd = transmitter output 17 27 39 52 rxd inpu t rxd = receiver input 18 28 40 53 rts# output rts# = ready to send handshake output 19 29 41 54 cts# input cts# = clear to send handshake input 21 30 43 55 dtr# output dtr# = data transmit ready modem signaling line 22 32 44 57 dsr# input dsr# = data set ready modem signaling line 23 33 45 58 dcd# input dcd# = data carrier detect modem signaling line 24 34 46 59 ri#/ txden input/output ri# = ring indicator control input. when the remote wake up option is enabled in the eeprom, taking ri# low can be u sed to resume the pc usb host controller from suspend . (see note 1 , 2 and 3 ) txden = (ttl level). for use with rs485 level converters. table 3 . 5 channel a,b,c and channel d asynchronous serial interface con figured pin descriptions notes 1. when using remote wake - up, ensure the resistors are pulled - up in suspend. also ensure peripheral designs do not allow any current sink paths that may partially power the peripheral. 2. if remote wake - up is enabled, a periphe ral is allowed to draw up to 2.5ma in suspend. if remote wake - up is disabled, the peripheral must draw no more than 500ua in suspend. 3. i f a p ull - d own is enabled, the 4232h will not wake up from suspend.
copyright ? 2010 future technology devices international limited 13 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 3.4.2 ft4232h pins used in a synchronous or asynchro nous bit - bang interface the ft4232h channel a , b, c or channel d can be configured as a bit - bang interface. there are two types of bit - bang modes: synchronous and asynchronous. when configured in any bit - bang mode (synchronous or asynchronous), the pins u sed and the descriptions of the signals are shown in table 3 . 6 channel number pin nos. name type synchronous or asynchronous bit - bang configuration description a 24,23,22,21 , 19,18,17,16 adbus[7:0] i/o channel a, d7 to d0 bidirectional bit - bang data b 34,33,32,30 , 29,28,27,26 bdbus[7:0] i/o channel b, d7 to d0 bidirectional bit - bang data c 46,45,44,43 , 41,40,39,38 cdbus[7:0] i/o channel c, d7 to d0 bidirectional bit - bang data d 59,58,57,55 54,53,52,48 ddbus[7:0] i/o channel d, d7 to d0 bidirectional bit - bang data table 3 . 6 channel a,b,c and channel d synchronous or asynchronous bit - bang configured pin descriptions for a functional description of this mode, please r efer to section 4.5 synchronous and as ynchronous bit - bang interface mode description .
copyright ? 2010 future technology devices international limited 14 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 3.4.3 ft4232h pins used in an mpsse the ft4232h channel a and channel b each have a mult i - protocol synchronous serial engine (mpsse). each mpsse can be independently configured to a number of industry standard serial interface protocols such as jtag, i2c or spi, or it can be used to implement a proprietary bus protocol. for example, it is po ssible to use one of the ft4232hs channels (e.g. channel a) to connect to an sram configurable fpga such as supplied by altera or xilinx. the fpga device would normally be un - configured (i.e. have no defined function) at power - up. application software on the pc could use the mpsse to download configuration data to the fpga over usb. this data would define the hardware function on power up. the other mpsse channel (e.g. channel b) would be available for another serial interface function while channel c and channel d can be configured as uart or bit - bang mode. alternatively each mpsse can be used to control a number of gpio pins. when configured in this mode, the pins used and the descriptions of the signals are shown in table 3 . 7 channel a pin no. channel b pin no. name type mpsse configuration description 16 26 tck/sk output clock signal output. for example: jtag C C 17 27 tdi/do output serial data output. for example: jtag C C 18 28 tdo/di input serial data input. for example: jtag C C 19 29 tms/cs output output signal select. for example: jtag C C 21 30 gpiol0 i/o general purpose input/output 22 32 gpiol1 i/o general purpose input/output 23 33 gpiol2 i/o general purpose input/output 24 34 gpiol3 i/o general purpose input/output table 3 . 7 channel a and channel b mpsse configured pin descriptions for a functional description of this mode, please refer to section 4.4 . when either channel a or channel b or both channels are used i n mpsse mode, channel c and channel d can be configured as asynchronous serial interface (rs232/422/485) or bit - bang mode or a combination of both.
copyright ? 2010 future technology devices international limited 15 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 4 function description the ft4232h is ftdis 5 th generation of usb devices. the ft4232h is a usb 2.0 high spee d (480mb/s) to uart/mpsse ics. it has the capability of being configured in a variety of industry standard serial interfaces. the ft4232h has four independent configurable interfaces. two of these interfaces can be configured as uart, jtag, spi, i2c or bit - bang mode, using an mpsse, with independent baud rate generators. the remaining two interfaces can be configured as uart or bit - bang. 4.1 key features usb high speed to quad interface . the ft4232h is a usb 2.0 high speed (480mbits/s) to quad flexible/configur able serial interfaces. functional integration . the ft4232h integrates a usb protocol engine which controls the physical universal transceiver macrocell interface (utmi) and handles all aspects of the usb 2.0 high speed interface. the ft4232h includes an integrated +1.8v low drop - out (ldo) regulator and 12mhz to 480mhz pll. it also includes 2kbytes tx and rx data buffers per channel. the ft4232h effectively integrates the entire usb protocol on a chip. mpsse .multi - purpose synchronous serial engines (mpsse ), capable of speeds up to 30 mbits/s, provides flexible synchronous interface configurations. data transfer rate. the ft4232h supports a data transfer rate up to 12 mbit/s when configured as an rs232/rs422/rs485 uart interface. please note the ft4232h do es not support the baud rates of 7 mbaud 9 mbaud, 10 mbaud and 11 mbaud . latency timer. this is really a feature of the driver and is used to as a timeout to flush short packets of data back to the pc. the default is 16ms, but it can be altered between 0m s and 256ms. at 0ms latency you get a packet transfer on every high speed microframe. 4.2 functional block descriptions quad multi - purpose uart/mpsse controllers. the ft4232h has four independent uart/mpsse controllers. these blocks control the uart data or co ntrol the bit - bang mode if selected by the setup command. the blocks used on channel a and channel b also contain a mpsse (multi protocol synchronous serial engine) in each of them which can be used independently of each other and the remaining uart chann els. using this it can be configured under software command to have 1 mpsse + 3 uarts (each uart can be set to bit bang mode to gain extra i/o if required) or 2 mpsse + 2 uarts. usb protocol engine and fifo control. the usb protocol engine controls and man ages the interface between the utmi phy and the fifos of the chip. it also handles power management and the usb protocol specification. dual port fifo tx buffer (2kbytes per channel). data from the host pc is stored in these buffers to be used by the multi - purpose uart/fifo controllers. this is controlled by the usb protocol engine and fifo control block. dual port fifo rx buffer (2kbytes per channel). data from the multi - purpose uart/fifo controllers is stored in these blocks to be sent back to the host pc when requested. this is controlled by the usb protocol engine and fifo control block. reset generator - the integrated reset generator cell provides a reliable power - on reset to the device internal circuitry at power up. the reset# input pin allows an ext ernal device to reset the ft4232h. reset# should be tied to vccio (+3.3v) if not being used. independent baud rate generators - the baud rate generators provides a x16 or a x10 clock input to the uarts from a 120mhz reference clock and consists of a 14 bi t pre - scaler and 4 register bits which provide fine tuning of the baud rate (used to divide by a number plus a fraction). this determines the baud rate of the uart which is programmable from 183 baud to 12 million baud. the ft2232h does not support the bau d rates of 7 mbaud 9 mbaud, 10 mbaud and 11 mbaud . see ftdi application note an232b - 05 on the ftdi website ( www.ftdichip.com ) for more details.
copyright ? 2010 future technology devices international limited 16 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 +1.8v ldo regulator. the +1.8v ldo regulator generates the +1.8 volts for the core and the usb transceiver cell. its input (vregin) must be connected to a +3.3v external power source. it is also recommended to add a n external filtering capacitor to the vregin. there is no direct connection from the +1.8v output (vregout) and the internal functions of the ft4232h. the pcb must be routed to connect vregout to the pins that require the +1.8v including vregin. utmi phy . the universal transceiver macrocell interface (utmi) physical interface cell. this block handles the full speed / high speed serdes (serialise - deserialise) function for the usb tx/rx data. it also provides the clocks for the rest of the chip. a 12 mhz cr ystal should be connected to the osci and osco pins. a 12k ohm resistor should be connected between ref and gnd on the pcb. the utmi phy functions include: supports 480 mbit/s "high speed" (hs)/ 12 mbit/s full speed (fs), fs only and "low speed" (ls). s ync/eop generation and checking. data and clock recovery from serial stream on the usb. bit - stuffing/unstuffing; bit stuff error detection. manages usb resume, wake up and suspend functions. single parallel data clock output with on - chip pll to generate hi gher speed serial data clocks. eeprom interface . when used without an external eeprom the ft4232h defaults to a quad usb to an asynchronous serial port device. adding an external 93c46 (93c56 or 93c66) eeprom allows customization of usb vid, pid, serial n umber, product description strings and power descriptor value of the ft4232h for oem applications. other parameters controlled by the eeprom include remote wake up, soft pull down on power - off and i/o pin drive strength. the eeprom must be a 16 bit wide c onfiguration such as a microchip 93lc46b or equivalent capable of a 1mbit/s clock rate at vcc = +3.00v to 3.6v. the eeprom is programmable in - circuit over usb using a utility program called mprog available from ftdis web site ( www.ftdichip.com ). this allo ws a blank part to be soldered onto the pcb and programmed as part of the manufacturing and test process. if no eeprom is connected (or the eeprom is blank), the ft4232h will default to serial ports. the device uses its built - in default vid (0403), pid (6 011) product description and power descriptor value. in this case, the device will not have a serial number as part of the usb descriptor.
copyright ? 2010 future technology devices international limited 17 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 4.3 ft232 uart interface mode description the ft4232h can be configured in similar uart modes as the ftdi ft232 devic es ( an asynchronous serial interface) . the following examples illustrate how to configure the ft4232h with an rs232, rs422 or rs485 interfaces. the ft4232 can be configured as a mixture of these interfaces. 4.3.1 rs232 configuration figure 4 . 1 illustrates how the ft4232h channel a can be configured with an rs232 uart interface. this can be repeated for channels b, c and d to provide a quad rs232, but has been omitted for clarity. figure 4 . 1 rs232 configuration
copyright ? 2010 future technology devices international limited 18 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 4.3.2 rs422 configuration figure 4 . 2 illustrates how the ft4232h can be configured as a dual rs422 interface. the ft4232h can have all 4 channels connected as rs422, but only chann el a and channel c are shown for clarity. figure 4 . 2 dual rs422 configuration in this case both channel a and channel c are configured as uart operating at ttl levels. the sipex s p491 is used as a level converter to convert the ttl level signals from the ft4232h to rs422 levels. the pwren# signal is used to power down the level shifters such that they operate in a low quiescent current when the usb interface is in suspend mode. f t 4 2 3 2 h t x d m _ a r x d p _ a r t s p _ a c t s p _ a g n d v c c 5 4 1 2 9 3 1 1 2 1 0 1 4 7 6 d r s p 4 9 1 5 4 1 2 9 3 1 1 2 1 0 1 4 7 6 d r s p 4 9 1 v c c 1 2 0 r 1 2 0 r t x d p _ a r x d m _ a r t s m _ a c t s m _ a t x d m _ c r x d p _ c r t s p _ c c t s p _ c g n d v c c 5 4 1 2 9 3 1 1 2 1 0 1 4 7 6 d r s p 4 9 1 5 4 1 2 9 3 1 1 2 1 0 1 4 7 6 d r s p 4 9 1 v c c 1 2 0 r 1 2 0 r t x d p _ c r x d m _ c r t s m _ c c t s m _ c d b 9 - m r s 4 2 2 c h a n n e l c d b 9 - m r s 4 2 2 c h a n n e l a s u s p e n d # t x d r x d r t s # c t s # d t r # d s r # d c d # r i # p w r e n # t x d r x d r t s # c t s # d t r # d s r # d c d # r i # 3 6 1 6 1 7 1 8 1 9 2 1 2 2 2 3 2 4 6 0 3 8 3 9 4 0 4 1 4 3 4 4 4 5 4 6
copyright ? 2010 future technology devices international limited 19 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 4.3.3 rs485 configuration figure 4 . 3 illustrates how the ft4232h can be configured as a dual rs485 interface. the ft4232h can have all 4 channels connected as rs485, but only channel a and channel c are shown for clarity . figure 4 . 3 dual rs485 configuration in this case both channel a and channel c are configured as rs485 operating at ttl levels. this example uses two sipex sp491 devices but there are similar parts availab le from maxim and analog devices amongst others. the sp491 is a rs485 device in a compact 8 pin sop package. it has separate enables on both the transmitter and receiver. with rs485, the transmitter is only enabled when a character is being transmitted fr om the uart. the txden pins on the ft4232h are provided for exactly that purpose, and so the transmitter enables are wired to the txdens. the receiver enable is active low, so it is wired to the pwren# pin to disable the receiver when in usb suspend mode. rs485 is a multi - drop network C i.e. many devices can communicate with each other over a single two wire cable connection. the rs485 cable requires to be terminated at each end of the cable. links are provided to allow the cable to be terminated if the d evice is physically positioned at either end of the cable. in this example the data transmitted by the ft4232h is also received by the device that is transmitting. this is a common feature of rs485 and requires the application software to remove the trans mitted data from the received data stream. with the ft4232h it is possible to do this entirely in hardware C simply modify the schematic so that rxd of the ft4232h is the logical or of the sp481 receiver output with txden using an hc32 or similar logic gat e. db 9 - m rs 485 channel a dm _ a gnd 120 r dpa vcc 4 3 6 2 1 7 8 5 d r sp 481 link ft 4 232 h txd rxd rts # cts # dtr # dsr # dcd # txden 16 17 18 19 21 22 23 24 pwren # 60 38 39 40 41 43 44 45 46 db 9 - m rs 485 channel c dm _ b gnd 120 r dp _ b vcc 4 3 6 2 1 7 8 5 d r sp 481 link txd rxd rts # cts # dtr # dsr # dcd # txden
copyright ? 2010 future technology devices international limited 20 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 4.4 mpsse interface mode description. mpsse mode is designed to allow the ft4232h to interface efficiently with synchronous serial protocols such as jtag, i2c and spi bus. it can also be used to program sram based fpgas over usb. the mpsse interface is d esigned to be flexible so that it can be configured to allow any synchronous serial protocol (industry standard or proprietary) to be implemented using the ft4232h. mpsse is only available on channel a and channel b. mpsse is fully configurable, and is pro grammed by sending commands down the data stream. these can be sent individually or more efficiently in packets. mpsse is capable of a maximum sustained data rate of 30 mbits/s . when a channel is configured in mpsse mode, the io timing and signals used are shown in figure 4 . 4 and table 4 . 1 . these show timings for clkout=30mhz. clkout can be divided internally to be provide a slower clock. figure 4 . 4 mpsse signal waveforms table 4 . 1 mpsse signal timings mpsse mode is enabled using set bit bang mode driver command. a hex value of 2 will enable it, and a h ex value of 0 will reset the device. see application note an2232l - 02, bit mode functions for the ft2232d for more details and examples. the mpsse command set is fully described in application note an_108 C command processor for mpsse and mcu host bus em ulation modes . the following additional application notes are available for configuring the mpsse : an_109 C programming guide for high speed ftci2c dll an_110 C programming guide for high speed ftcjtag dll an_111 C programming guide for high speed f tcspi dll name min nom max units comment t1 33.33 ns clkout period t2 15 16.67 ns clkout high period t3 15 16.67 ns clkout low period t4 1 7.15 ns clkout to tdi/do delay t5 0 ns tdo/di hold time t6 11 tdo/di setup time
copyright ? 2010 future technology devices international limited 21 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 4.4.1 mpsse adaptive clocking adaptive clocking is a new mpsse feature added to the ft2 4 232h mpsse engine. the mode is effectively handshaking the clk signal with a return clock rtck. this is a technique used by arm processors. the ft4 232h will asse rt the clk line and wait for the rtck to be returned from the target device to gpiol3 line before changing the tdo (data out line). figure 4 . 5 adaptive clocking interconnect figure 4 . 6 : adaptive clocking waveform. adaptive clocking is not enabled by default. see: an_108 command processor for mpsse and mcu host bus emulation modes. f t 4 2 3 2 h a r m c p u r t c k t c k t d o g p i o l 3 t d o t c k r t c k t d o c h a n g e s o n f a l l i n g e d g e o f t c k
copyright ? 2010 future technology devices international limited 22 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 4.5 synchronous and as ynchronous bit - bang interface mode description the ft4232h channel a,b,c or channel d can be configured as a bit - bang interface. there are two types of bit - bang modes: synchronous and asynchronous. asynchronous bit - bang mode asynchronous bit - bang mode is the same as bm - style bit - bang mode. on any channel configured in asynchronous bit - bang mode. data written to the device in the normal manner will be self clocked onto the parallel i/o data pins (those which have been configured as outputs). each i/o pin ca n be independently set as an input or an output. the rate that the data is clocked out at is controlled by the baud rate generator. for the data to change there has to be new data written, and the baud rate clock has to tick. if no new data is written to t he channel, the pins will hold the last value written. synchronous bit - bang mode the synchronous bit - bang mode will only update the output parallel i/o port pins whenever data is sent from the usb interface to the parallel interface. when this is done, dat a is read from the usb rx fifo buffer and written out on the pins. data can only be received from the parallel pins (to the usb tx fifo interface) when the parallel interface has been written to. with synchronous bit - bang mode, data will only be sent out by the ft4232h if there is space in the ft4232h usb txfifo for data to be read from the parallel interface pins. this synchronous bit - bang mode will read the data bus parallel i/o pins first, before it transmits data from the usb rxfifo. it is therefore 1 byte behind the output, and so to read the inputs for the byte that you have just sent, another byte must be sent. for example : - (1) pins start at 0xff send 0x55,0xaa pins go to 0x55 and then to 0xaa data read = 0xff,0x55 (2) pins start at 0xff send 0x 55,0xaa,0xaa (repeat the last byte sent) pins go to 0x55 and then to 0xaa data read = 0xff,0x55,0xaa synchronous bit - bang mode differs from asynchronous bit - bang mode in that the device parallel output is only read when the parallel output is written to by the usb interface. this makes it easier for the controlling program to measure the response to a usb output stimulus as the data returned to the usb interface is synchronous to the output data. asynchronous bit - bang mode is enabled using set bit bang mode driver command. a hex value of 1 will enable asynchronous bit - bang mode. synchronous bit - bang mode is enabled using set bit bang mode driver command. a hex value of 4 will enable synchronous bit - bang mode. see application note an2232 - 02, bit mode functi ons for the ft2232 for more details and examples of using the bit - bang modes. an example of the synchronous bi - bang mode timing is shown in figure 4 . 7 and table 4 . 2 .
copyright ? 2010 future technology devices international limited 23 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 figure 4 . 7 synchronous bit - bang mode timing interface example it should be noted that the ft4232h does not output the wrstb# or rdstb# signals when configured in bit - bang mode. figure 4 . 7 . and table 4 . 2 show these signals for illustration purposes only. table 4 . 2 synchronous bit - bang mode timing interface example timings wrstb# = this output indicates when new data has been written to the i/o pins from the host pc (via the usb interface) . rdstb# = this output rising edge indicates when data has been read from the i/o pins and sent to the host pc (via the usb interface) . w r s t b # r d s t b # name description t1 current pin state is read t2 rdstb# is set inactive and data on the paralle i/o pins is read and sent to the usb host. t3 rdstb# is set active again, and any pins that are output will change to their new data t4 1 clock cycle to allow for data setup t5 wrstb# goes active. this indicates that the host pc has written new data to the i/o parallel data pins t6 wrstb# goes inactive
copyright ? 2010 future technology devices international limited 24 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 4.6 ft4232h mode selection the 4 channels of the ft4232h reset to 4 asynchronous serial uart interfaces. following a reset, the required mode can be configured by sending the ft_setbitmode command (refer to d2xx_progr ammers_guide ) to the usb driver software. the eeprom contents have no effect on the selected mode with the exception of selecting the txden for rs485 mode when asynchronous serial interface has been selected in software. if the device is reset, then the 4 channels must be reconfigured into the required mode. note that the mode of each of the 4 channels is independent of the other channels. the mpsse can be configured directly using the d2xx commands. the d2xx_programmers_guide is available from the ftdi w ebsite at http://www.ftdichip.com/documents/programguides/d2xx_programmer's_guide(ft_000071).pdf also the mpsse command set is fully described in applicati on note an_108 C command processor for mpsse and mcu host bus emulation modes .
copyright ? 2010 future technology devices international limited 25 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 5 devices characteristics and ratings 5.1 absolute maximum ratings the absolute maximum ratings for the ft4232h devices are as follows. these are in accordance with the absolute maximum rating system (iec 60134). exceeding these values may cause permanent damage to the device. parameter value unit storage temperature - 65c to 150c degrees c floor life (out of bag) at factory ambient (30c / 60% relative humidity) 168 hours (i pc/jedec j - std - 033a msl level 3 compliant)* hours ambient operating temperature (power applied) - 40c to 85c degrees c mttf ft4232hl tbd hours mttf ft4232hq tbd hours vcore supply voltage - 0.3 to +2.0 v vccio io voltage - 0.3 to +4.0 v dc input vol tage C C C C table 5 . 1 absolute maximum ratings * if devices are stored out of the packaging beyond this time limit the devices should be baked before use. the devices should be ramped up to a temperature of +125 c and baked for up to 17 hours .
copyright ? 2010 future technology devices international limited 26 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 5.2 dc ch aracteristics dc characteristics (ambient temperature = - 40c to +85c) parameter description minimum typical maximum units conditions vcore vcc core operating supply voltage 1.62 1.80 1.98 v vccio * vccio operating supply voltage 2.97 3.30 3.63 v cells are 5v tolerant vregin vregin voltage regulator input 3.00 3.30 3.60 v vregout voltage regulator output 1.71 1.80 1.89 v ireg regulator current 150 ma vregin +3.3v icc1 core operating supply current --- 70 --- ma vcore = +1.8v normal operation icc 1r core reset supply current --- 5 --- ma vcore = +1.8v device in reset state. icc1s core suspend supply current 500 a vcore = +1.8v usb suspend table 5 . 2 operating voltage and current *note: failure to connect all vccio pins will result in failure of the device.
copyright ? 2010 future technology devices international limited 27 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 the i/o pins are +3.3v cells, which are +5v tolerant (except the usb phy pins). parameter description minimum typical maximum units conditions voh output voltage high 2.40 3.14 v ioh = +/ - 2m a i/o drive strength* = 4ma 3.20 v i/o drive strength* = 8ma 3.22 v i/o drive strength* = 12ma 3.22 v i/o drive strength* = 16ma vol output voltage low 0.18 0.40 v iol = +/ - 2ma i/o drive strength* = 4ma 0.12 v i/o drive strength* = 8m a 0.08 v i/o drive strength* = 12ma 0.07 v i/o drive strength* = 16ma vil input low switching threshold - 0.80 v lvttl vih input high switching threshold 2.0 - v lvttl vt switching threshold 1.50 v lvttl vt - schmitt trigger negative going threshold voltage 0.80 1.10 - v vt+ schmitt trigger positive going threshold voltage 1.60 2.0 v rpu input pull - up resistance 40 75 190 k? vin = 0 rpd input pull - down resistance 40 75 190 k? vin =vccio iin input leakage current 15 45 85 a vin = 0 ioz tri - state output leakage current +/ - 10 a vin = 5.5v or 0 table 5 . 3 i/o pin characteris tics (except usb phy pins) *the i/o drive strength and slow slew - rate are configurable in the eeprom.
copyright ? 2010 future technology devices international limited 28 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 dc characteristics (ambient temperature = - 40c to +85c) parameter description minimum typical maximum units conditions vphy, vpll phy operating suppl y voltage 3.0 3.3 3.6 v 3.3v i/o iccphy phy operating supply current --- 30 60 ma high - speed operation at 480 mhz iccphy (susp) phy operating supply current --- 10 50 a usb suspend table 5 . 4 phy operating voltage and current parameter description minimum typical maximum units conditions voh output voltage high vcore - 0.2 v vol output voltage low 0.2 v vil input low switching threshold - 0.8 v vih input high switching threshold 2.0 - v table 5 . 5 phy i/o pin characteristics 5.3 esd tolerance e sd protection for ft4 232h ios parameter reference minimum typical maximum units human body model (hbm) jedec eia/ jesd22 - a114 - b , class 2 2kv k v machine mode (mm) jedec eia/ jesd22 - a115 - a , class b 200v v charge device model (cdm) jedec eia/ jesd22 - c101 - d, class - iii 5 00v v latch - up jesd78 , trigger class - ii 200 ma ma table 5 . 6 esd tolerance
copyright ? 2010 future technology devices international limited 29 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 6 ft4232h configurations the following sections illustrate possible usb power configurations for the ft4232h. all usb power configurations illustrated apply to both package options fo r the ft4232h device 6.1 usb bus powered configuration bus powered application example 1: bus powered configuration figure 6 . 1 bus powered configuration example 1 figure 6 . 1 illustrates the ft4232h in a typical usb bus powered design configuration. a usb bus powered device gets its power from the usb bus. in this application, the ft4232h requires that the vbus (usb +5v) is regulated down to +3.3v (using an ldo) to supp ly the vccio, vpll, vphy and vregin. vregin is the +3.3v input to the on chip +1.8v regulator. the output of the on chip ldo regulator (+1.8v) drives the ft4232h core supply (vcore). this requires a minimum of a 3.3uf filter capacitor. g n d 1 osci 2 osco 3 4 g n d 5 ref 6 dm 7 dp 8 9 a g n d 1 0 g n d 1 1 v c o r e 1 2 test 13 reset # 14 g n d 1 5 adbus 0 16 17 18 19 v c c i o 2 0 21 22 23 24 g n d 2 5 26 27 28 29 30 v c c i o 3 1 32 33 34 g n d 3 5 suspend # 36 v c o r e 3 7 38 39 40 41 v c c i o 4 2 43 44 45 46 g n d 4 7 48 vregout 49 vregin 50 g n d 5 1 52 53 54 v c c i o 5 6 55 57 58 59 pwren # 60 eeclk 62 eedata 61 eecs 63 v c o r e 6 4 vin vout gnd ldo + 3 . 3 v gnd vbus 1 d - 2 d + 3 gnd 4 100 nf 100 nf 100 nf 100 nf gnd gnd gnd gnd gnd 4 . 7 uf 4 . 7 uf gnd gnd + 1 . 8 v + 3 . 3 v + 1 . 8 v + 3 . 3 v 100 nf 100 nf 100 nf 100 nf 100 nf 100 nf 100 nf + 1 . 8 v + 1 . 8 v + 1 . 8 v + 3 . 3 v + 3 . 3 v + 3 . 3 v + 3 . 3 v gnd gnd gnd gnd gnd gnd gnd + 3 . 3 v + 3 . 3 v 12 k 1 k gnd + 3 . 3 v 27 pf 27 pf cs 1 scl 2 d 3 q 4 gnd 5 org 6 du 7 vcc 8 93 c 46 gnd gnd gnd + 3 . 3 v + 3 . 3 v 2 . 2 k 10 k 10 k 10 k 1 3 12 mhz eeclk eedata gnd adbus 1 adbus 2 adbus 3 adbus 4 adbus 5 adbus 6 adbus 7 bdbus 0 bdbus 1 bdbus 2 bdbus 3 bdbus 4 bdbus 5 bdbus 6 bdbus 7 cdbus 0 cdbus 1 cdbus 2 cdbus 3 cdbus 4 cdbus 5 cdbus 6 cdbus 7 ddbus 0 ddbus 1 ddbus 2 ddbus 3 ddbus 4 ddbus 5 ddbus 6 ddbus 7 v p h y v p l l 0 ? gnd 3 . 3 uf
copyright ? 2010 future technology devices international limited 30 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 bus powered applic ation example 2: bus powered configuration (with additional 1.8v ldo voltage regulator for vcore) figure 6 . 2 bus powered configuration example 2 figure 6 . 3 illustra tes the ft4232h in a typical usb bus powered configuration similar to figure 6 . 1 . the difference here is that the +1.8v for the ft4232h core (vcore) has been regulated from the vbus as well as the +3.3v supply to t he vpll, vphy, vccio and vregin. vbus 1 d - 2 d + 3 gnd 4 100 nf 100 nf gnd gnd 4 . 7 uf 4 . 7 uf gnd gnd + 1 . 8 v + 3 . 3 v 100 nf 100 nf 100 nf 100 nf 100 nf 100 nf 100 nf + 1 . 8 v + 1 . 8 v + 1 . 8 v + 3 . 3 v + 3 . 3 v + 3 . 3 v + 3 . 3 v gnd gnd gnd gnd gnd gnd gnd + 3 . 3 v + 3 . 3 v 12 k 1 k gnd + 3 . 3 v 27 pf 27 pf cs 1 scl 2 d 3 q 4 gnd 5 org 6 du 7 vcc 8 93 c 46 gnd gnd gnd + 3 . 3 v + 3 . 3 v 2 . 2 k 10 k 10 k 10 k 1 3 12 mhz eeclk eedata gnd vin vout gnd ldo + 1 . 8 v gnd + 1 . 8 v 100 nf gnd 100 nf gnd g n d 1 osci 2 osco 3 4 g n d 5 ref 6 dm 7 dp 8 9 a g n d 1 0 g n d 1 1 v c o r e 1 2 test 13 reset # 14 g n d 1 5 adbus 0 16 17 18 19 v c c i o 2 0 21 22 23 24 g n d 2 5 26 27 28 29 30 v c c i o 3 1 32 33 34 g n d 3 5 suspend # 36 v c o r e 3 7 38 39 40 41 v c c i o 4 2 43 44 45 46 g n d 4 7 48 vregout 49 vregin 50 g n d 5 1 52 53 54 v c c i o 5 6 55 57 58 59 pwren # 60 eeclk 62 eedata 61 eecs 63 v c o r e 6 4 adbus 1 adbus 2 adbus 3 adbus 4 adbus 5 adbus 6 adbus 7 bdbus 0 bdbus 1 bdbus 2 bdbus 3 bdbus 4 bdbus 5 bdbus 6 bdbus 7 cdbus 0 cdbus 1 cdbus 2 cdbus 3 cdbus 4 cdbus 5 cdbus 6 cdbus 7 ddbus 0 ddbus 1 ddbus 2 ddbus 3 ddbus 4 ddbus 5 ddbus 6 ddbus 7 v p h y v p l l 0 ? gnd vin vout gnd ldo + 3 . 3 v gnd 100 nf 100 nf gnd gnd + 3 . 3 v
copyright ? 2010 future technology devices international limited 31 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 6.2 usb self powered configuration self powered application example 1: self powered configuration figure 6 . 3 self powered configuration example 1 figure 6 . 3 illustrates the ft4232h in a typical usb self powered configuration. a usb self powered device gets its power from its own power supply and does not draw current from the usb bus. in this example an external power supply is used. th is external supply is regulated to +3.3v. note that in this set - up, the eeprom should be configured for self - powered operation. vin vout gnd ldo + 3 . 3 v gnd vbus 1 d - 2 d + 3 gnd 4 100 nf 100 nf 100 nf 100 nf gnd gnd gnd gnd gnd 4 . 7 uf 4 . 7 uf gnd gnd + 1 . 8 v + 3 . 3 v + 1 . 8 v + 3 . 3 v 100 nf 100 nf 100 nf 100 nf 100 nf 100 nf 100 nf + 1 . 8 v + 1 . 8 v + 1 . 8 v + 3 . 3 v + 3 . 3 v + 3 . 3 v + 3 . 3 v gnd gnd gnd gnd gnd gnd gnd + 3 . 3 v + 3 . 3 v 12 k 1 k gnd 27 pf 27 pf cs 1 scl 2 d 3 q 4 gnd 5 org 6 du 7 vcc 8 93 c 46 gnd gnd gnd + 3 . 3 v + 3 . 3 v 2 . 2 k 10 k 10 k 10 k 1 3 12 mhz eeclk eedata gnd 1 2 ext . power sup p ly gnd g n d 1 osci 2 osco 3 4 g n d 5 ref 6 dm 7 dp 8 9 a g n d 1 0 g n d 1 1 v c o r e 1 2 test 13 reset # 14 g n d 1 5 adbus 0 16 17 18 19 v c c i o 2 0 21 22 23 24 g n d 2 5 26 27 28 29 30 v c c i o 3 1 32 33 34 g n d 3 5 suspend # 36 v c o r e 3 7 38 39 40 41 v c c i o 4 2 43 44 45 46 g n d 4 7 48 vregout 49 vregin 50 g n d 5 1 52 53 54 v c c i o 5 6 55 57 58 59 pwren # 60 eeclk 62 eedata 61 eecs 63 v c o r e 6 4 adbus 1 adbus 2 adbus 3 adbus 4 adbus 5 adbus 6 adbus 7 bdbus 0 bdbus 1 bdbus 2 bdbus 3 bdbus 4 bdbus 5 bdbus 6 bdbus 7 cdbus 0 cdbus 1 cdbus 2 cdbus 3 cdbus 4 cdbus 5 cdbus 6 cdbus 7 ddbus 0 ddbus 1 ddbus 2 ddbus 3 ddbus 4 ddbus 5 ddbus 6 ddbus 7 v p h y v p l l 0 ? gnd 3 . 3 uf gnd 10 k 4 . 7 k
copyright ? 2010 future technology devices international limited 32 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 self powered application example 2: self powered configuration (with additional 1.8v ldo voltage regulator for vcore) figur e 6 . 4 self powered configuration example 2 figur e 6 . 4 illustrates the ft4232h in a typical usb self powered configuration similar to figure 6 . 3 . the difference here is that the +1.8v for the ft4232h core has been regulated from the external power supply. note that in this set - up, the eeprom should be configured for self - powered operation. vbus 1 d - 2 d + 3 gnd 4 100 nf 100 nf gnd gnd 4 . 7 uf 4 . 7 uf gnd gnd + 1 . 8 v + 3 . 3 v 100 nf 100 nf 100 nf 100 nf 100 nf 100 nf 100 nf + 1 . 8 v + 1 . 8 v + 1 . 8 v + 3 . 3 v + 3 . 3 v + 3 . 3 v + 3 . 3 v gnd gnd gnd gnd gnd gnd gnd + 3 . 3 v + 3 . 3 v 12 k 1 k gnd 27 pf 27 pf cs 1 scl 2 d 3 q 4 gnd 5 org 6 du 7 vcc 8 93 c 46 gnd gnd gnd + 3 . 3 v + 3 . 3 v 2 . 2 k 10 k 10 k 10 k 1 3 12 mhz eeclk eedata gnd vin vout gnd ldo + 1 . 8 v gnd + 1 . 8 v 100 nf gnd 100 nf gnd 1 2 ext . power sup p ly gnd g n d 1 osci 2 osco 3 4 g n d 5 ref 6 dm 7 dp 8 9 a g n d 1 0 g n d 1 1 v c o r e 1 2 test 13 reset # 14 g n d 1 5 adbus 0 16 17 18 19 v c c i o 2 0 21 22 23 24 g n d 2 5 26 27 28 29 30 v c c i o 3 1 32 33 34 g n d 3 5 suspend # 36 v c o r e 3 7 38 39 40 41 v c c i o 4 2 43 44 45 46 g n d 4 7 48 vregout 49 vregin 50 g n d 5 1 52 53 54 v c c i o 5 6 55 57 58 59 pwren # 60 eeclk 62 eedata 61 eecs 63 v c o r e 6 4 adbus 1 adbus 2 adbus 3 adbus 4 adbus 5 adbus 6 adbus 7 bdbus 0 bdbus 1 bdbus 2 bdbus 3 bdbus 4 bdbus 5 bdbus 6 bdbus 7 cdbus 0 cdbus 1 cdbus 2 cdbus 3 cdbus 4 cdbus 5 cdbus 6 cdbus 7 ddbus 0 ddbus 1 ddbus 2 ddbus 3 ddbus 4 ddbus 5 ddbus 6 ddbus 7 v p h y v p l l 0 ? gnd vin vout gnd ldo + 3 . 3 v gnd 100 nf 100 nf gnd gnd + 3 . 3 v vbus gnd 10 k 4 . 7 k
copyright ? 2010 future technology devices international limited 33 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 6.3 oscillator configuration figure 6 . 5 recommended ft4232h crystal oscillator configuration. figure 6 . 5 illustrates how to connect the ft4232h with a 12mhz 0.003 % crystal. in this case loading capacitor s should to be added between osci, osco and gnd as shown. a value of 27pf is shown as the capacitor in the example C this will be good for many crystals but it is recommended to select the loading capacitor value based on the manufacturers recommendations wherever possible. it is recommended to use a parallel cut type crystal. it is also possible to use a 12 mhz oscillator with the ft4232h. in this case the output of the oscillator would drive osci, and osco should be left unconnected. the oscillator must have a cmos output drive capability. parameter description minimum typical maximum units conditions osci vin input voltage 2.97 3.30 3.63 v fin input frequency 12 mhz +/ - 30ppm ji cycle to cycle jitter < 150 ps table 6 . 1 osci input characteristics osci osco 2 3 ft 4 232 h crystal 12 mhz 27 pf 27 pf
copyright ? 2010 future technology devices international limited 34 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 6.4 4 channel transmit and receiver led indication example the following example illustrates how a 74hct595 can be used to decode the eedata data to indicate tx and rx on each of the channels. the associa ted led will light when the channel is transmitting or receiving data. figure 6 . 6 using 74hc 595 to indicate tx and rx data in this configuration, the leds will flash when the ee p rom is accessed e.g. during enumeration. under normal operation, the eecs is held low to disable access to the eeprom. in this special case, the eeclk (frequency = 1.56s) will clock the eedata into the 74hc 595 shift register (with eecs low, therefore eepr om ignores the eedata). then eecs will pulse high. the rising edge of the eecs latches the data into a storage register of the 74hc 595 which drives the leds. please refer to the 74hc 595 datasheet for further explanation . s n 7 4 h c 5 9 5 d eecs pwren # eeclk eedata vio = vccio
copyright ? 2010 future technology devices international limited 35 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 7 eeprom configuration if an external eeprom is fitted (93lc46/56/66) it can be programmed over usb using ft_prog . the eeprom must be 16 bits wide and capable or working at a vcc supply of +3.0 to +3.6 volts.
copyright ? 2010 future technology devices international limited 36 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 8 package parameters the ft4232h is available in two d ifferent packages. the ft4232hl is the lqfp - 64 option and the ft4232hq is the qfn - 64 package option. the solder reflow profile for both packages is described in section 8.3
copyright ? 2010 future technology devices international limited 37 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 8.1 ft4232hq, qfn - 64 package dimensions figure 8 . 1 64 pin qfn package details notes 1. all dimensions are in mm. 2. pin 1 id can be combination of dot and/or chamfer. 3. pin 1 id is not connected to the internal groun d of the device. it is internally connected to the bottom side central solder pad, which is 4.35 x 4.35mm. 4. pin 1 id can be connected to system ground, but it is not recommended using this as a ground point for the device . 5. optional chamfer on corner l eads. f t d i y y w w - a x x x x x x x x x x x x f t 4 2 3 2 h q 1 6 4 i n d i c a t e s p i n # 1 ( l a s e r m a r k e d ) t o p v i e w 1 6 1 7 3 2 3 3 4 8 4 9 9 . 0 0 0 + / - 0 . 0 7 5 9 . 0 0 0 + / - 0 . 0 7 5 l i n e 1 C f t d i l o g o l i n e 2 C d a t e c o d e a n d r e v i s i o n l i n e 3 C w a f e r l o t n u m b e r l i n e 4 C f t d i p a r t n u m b e r
copyright ? 2010 future technology devices international limited 38 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 8.2 ft4232hl, lqfp - 64 package dimensions figure 8 . 2 64 pin lqfp package details ft di yyww - a xxxxxxxxxxxx ft 4232 hl 1 64 indicates pin # 1 ( laser marked ) top view 16 17 32 33 48 49 10 . 000 +/ - 0 . 1 1 0 . 0 0 0 + / - 0 . 1 line 1 C ftdi logo l ine 2 C date code and revision l ine 3 C wafer lot number l ine 4 C ftdi part number dimensions are body dimensions ( mm ) 64 17 1 16 32 33 48 49 d 1 e 1 d e 0 . 25 1 . 6 0 m a x 12 o +/ - 1 o 1 . 4 + / - 0 . 0 5 0 . 2 min 0 . 6 +/ - 0 . 15 1 . 0 0 . 05 min 0 . 15 max b c b 1 c 1 e
copyright ? 2010 future technology devices international limited 39 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 symbol min nom max d 11.8 12 12.2 d1 9.9 10 10.1 e 11.8 12 12.2 e1 9.9 10 10.1 b 0.17 0.22 0.27 c 0.09 0.2 b1 0 .17 0.2 0.23 c1 0.09 0.16 e 0.5 bsc table 8 . 1 64 pin lqfp package details C dimensions (in mm)
copyright ? 2010 future technology devices international limited 40 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 8.3 solder reflow profile figure 8 . 3 64 pin lqfp and qfn refl ow solder profile
copyright ? 2010 future technology devices international limited 41 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 profile feature pb free solder process (green material) snpb eutectic and pb free (non green material) solder process average ramp up rate (t s to t p ) 3c / second max. 3c / second max. preheat - temperature min (t s min.) - temp erature max (t s max.) - time (t s min to t s max) 150c 200c 60 to 120 seconds 100c 150c 60 to 120 seconds time maintained above critical temperature t l : - temperature (t l ) - time (t l ) 217c 60 to 150 seconds 183c 60 to 150 seconds peak temperature (t p ) 260c see table 8 . 3 time within 5c of actual peak temperature (t p ) 30 to 40 seconds 20 to 40 seconds ramp down rate 6c / second max. 6 c / second max. time for t= 25c to peak temperature, t p 8 minutes max. 6 minutes max. table 8 . 2 reflow profile parameter values snpb eutectic and pb free (non green material) package thickness volu me mm3 < 350 volume mm3 >=350 < 2.5 mm 235 +5/ - 0 deg c 220 +5/ - 0 deg c 2.5 mm 220 +5/ - 0 deg c 220 +5/ - 0 deg c pb free (green material) = 260 +5/ - 0 deg c table 8 . 3 package reflow peak tempera ture
copyright ? 2010 future technology devices international limited 42 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 9 contact information head office C glasgow, uk future technology devices international limited unit 1, 2 seaward place, glasgow g41 1hh united kingdom tel: +44 (0) 141 429 2777 fax: +44 (0) 141 429 2758 e - mail (sales) vinculum.sales@ftdichip.com e - mail (support) vinculum.support@ftdichip.com e - mail (general enquiries) admin1@ftdichip.com web site url http://www.ftdichip.com web shop url http://www.ftdichip.com branch office C taipei, taiwan future technology devices international limited (taiwan) 2f, no. 516, sec. 1, neihu road tai pei 114 taiwan , r.o.c. tel: +886 (0) 2 8797 1330 fax: +886 (0) 2 8751 9737 e - mail (sales) tw.sales1@ftdichip.com e - mail (support) tw.support1@ftdichip.com e - mai l (general enquiries) tw.admin1@ftdichip.com web site url http://www.ftdichip.com branch office C hillsboro, oregon, usa future technology devices international limite d (usa) 7235 nw evergreen parkway, suite 600 hillsboro, or 97123 - 5803 usa tel: +1 (503) 547 0988 fax: +1 (503) 547 0987 e - mail (sales) us.sales@ftdichip.com e - mail (support) us.admin@ftdichip.com web site url http://www.ftdichip.com branch office C shanghai, china future technology devices international limited (china) room 408, 317 xianxia road, changning district, shanghai , china tel: +86 (21) 62351596 fax: +86 (21) 62351595 e - mail (sales): cn.sales@ftdichip.com e - mail (support): cn .support@ftdichip .com e - mail (general enquiries): cn. admin1@ftdichip.com web site url: http://www.ftdichip.com distributor and sales representatives please visit the sales network page of the ftdi web site for the contact details of our distributor(s) and sales representative(s) in your country.
copyright ? 2010 future technology devices international limited 43 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 appendix a - list of figures and tables list of tables table 3.1 ft4232h pin configurations ................................ ................................ ....................... 9 table 3.2 power and ground ................................ ................................ ................................ ........ 10 table 3.3 common function pins ................................ ................................ ................................ .. 11 table 3.4 eeprom interface group ................................ ................................ ............................... 11 table 3.5 channel a,b,c and channel d asynchronous serial interface configured pin descriptions ...... 12 table 3.6 channel a,b,c and channel d synchronous or a synchronous bit - bang configured pin descriptions ................................ ................................ ................................ ............................. 13 table 3.7 channel a and channel b mpsse configured pin descriptions ................................ .. 14 table 4.1 m psse signal timings ................................ ................................ ................................ ... 20 table 4.2 synchronous bit - bang mode timing interface example timings ................................ .......... 23 table 5.1 absolute maximum ratings ................................ ................................ ............................ 25 table 5.2 operating voltage and current ................................ ................................ ....................... 26 table 5.3 i/o pin characteristics (except usb phy pins) ................................ ................................ .. 27 table 5.4 phy operating voltage and current ................................ ................................ ................. 28 table 5.5 phy i/o pin characteristics ................................ ................................ ............................ 28 table 5.6 esd tole rance ................................ ................................ ................................ .............. 28 table 6.1 osci input characteristics ................................ ................................ ............................. 33 table 8.1 64 pin lqfp package details C dimensions (in mm) ................................ ........................... 39 table 8.2 reflow profile parameter values ................................ ................................ ..................... 41 table 8.3 package reflow peak temperature ................................ ................................ .................. 41 list of figures figure 2.1 ft4232h block diagram ................................ ................................ ................................ . 4 figure 3.1 ft4232h schematic symbol ................................ ................................ ............................ 7 figure 4.1 rs232 configu ration ................................ ................................ ................................ .... 17 figure 4.2 dual rs422 configuration ................................ ................................ ............................. 18 figure 4.3 dual rs485 configuration ................................ ................................ ............................. 19 figure 4.4 mpsse signal waveforms ................................ ................................ ............................. 20 figure 4.5 adaptive clocking interconnect ................................ ................................ ..................... 21 figure 4.6 : adaptive clocking wavefor m. ................................ ................................ ....................... 21 figure 4.7 synchronous bit - bang mode timing interface example ................................ .................... 23 figure 6.1 bus powered configuration example 1 ................................ ................................ ............ 29 figure 6.2 bus powered configuration example 2 ................................ ................................ ............ 30 figure 6.3 self powered configuration example 1 ................................ ................................ ........... 31 figure 6.4 self powered configuration example 2 ................................ ................................ ........... 32 figure 6.5 recommended ft4232h crystal oscillator configuration. ................................ ................. 33 figure 6.6 using 74hct595 to indicate tx and rx data ................................ ................................ ... 34 figure 8.1 64 pin qfn package details ................................ ................................ .......................... 37 figure 8.2 64 pin lqfp package detail s ................................ ................................ ......................... 38
copyright ? 2010 future technology devices international limited 44 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 figure 8.3 64 pin lqfp and qfn reflow solder profile ................................ ................................ ..... 40
copyright ? 2010 future technology devices international limited 45 document no.: ft_000060 ft4232h quad high speed usb to multipurpose uart/mpsse ic datasheet ve rsion 2.09 clearance no.: ftdi#78 appendix b - revision history revision history version draft initial datasheet created october 2008 version preliminary preliminary datasheet released 23 rd october 2008 version 1.00 datasheet released 4 th november 2008 version 1.10 qfn package update november 2008 version 2.00 various updates january 2009 version 2.01 c hanged description of bit - bang mode february 2009 version 2.02 corrected qfn tray numbers from 160 to 260 per tray march 2009 version 2.03 corrected signal names in fig 2.1 1 9 th may 2009 added reference to an_109, an_110, an_111 and an_113. corrected default of ri#/ txden in table 3.1 version 2.04 added paragraph on latency timer to section 4.1 3 rd june 2009 version 2.05 corrected figures 6.2, 6.3 and 6.4 C m is sing regulators and better way 17 th june 2009 of holding self powered designs in reset if not connected to usb. corrected max dc inputs on dc input voltage C all other inputs pins from vcore+0.5v to vccio+0.5v version 2.06 added explanatio n of mpsse adaptive clocking (4.4.1). 21 st sept 2009 corrected 12mhz crystal specification version 2.07 corrected sec tion 4.2 - eeprom description 18 th december 2009 version 2.08 added tid number ( section 1.3) 24 th may 2010 added esd specifica tions version 2.09 added usb certified logo in section 1.3 2 nd sep 2010 clarified unsupported baud rates of 7,9,10 and 11 mbaud. section 3.4.1, added clarifications about wake up replaced 74hct595 with 74hc595 in section 6.4 edited figure 4.1, re moved txled and rxled reference

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